How We Do It
“Interconnect delay has moved to the forefront as the limiting factor in IC performance.” — EE Times
The cornerstone of APIC’s technology lies in its development of novel optical interconnect architectures that promise to supplant copper wiring in carrying data from board to board, from chip to chip, and, from one core to another within a single chip.
As data rates within microelectronic systems increase, the bandwidth of traditional copper interconnects is increasingly constrained by signal distortion, power consumption, and cross-talk. Optical interconnects offer higher bandwidth, lower latency, and diminished power consumption along with a lack of vulnerability to EMI. If optical interconnects are to be a viable and cost-effective alternative, however, they must be fabricated in a manner that is compatible with electronic circuitry.
APIC is answering the need for high-performance optical interconnects by using SOI substrates, rather than higher-cost material, to pursue optical interconnect designs that are at once high speed and low cost.